FPGA Implementation of Processing Algorithms for Digital Images

“FPGA Implementation of Processing Algorithms for Digital Images”

Objectives

To train the students in:

Modelling & HDL design of algorithms for Digital image processing.

Implementing the algorithms on FPGA

Estimating the performance measure of the image processing architecture.

Duration & Timings

Duration	14 Hours
Timings	Feb 02 & 03, 2018 – 9AM to 5PM

Conditions

Fees per candidate	1.Internal : Rs.200/-(with GST)
Eligibility	III year Students from circuit stream
Intended participants	30 Nos

Course Coordinators

Dr.K.N.Vijeyakumar
Associate Professor / ECE
Mr.B.Pradeep Kumar
Ms.S.Kalaiselvi
Mr.H.Maheshkumar
Assistant Professors/ECE
Ms.P.Sathyabama
Assistant Professor(SS)/ECE

Quick Links

Click Here - www.drmcet.ac.in

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